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cyberspiceA little while ago I wrote this blog post about adding ethernet capability to my aged BBC Microcomputer. Since then not a lot has happened. But very recently a couple of things have reinvigorated the project.
I was having problems because the WIZ810mj module I was intending to use has 2mm board to board connectors on it. This isn't very hobbyist friendly. However I discovered very recently that there's a variation of the module, the WIZ812mj which actually has 0.1" pitch board to board connectors on it. This is great because it means I can use stripboard for construction. The WIZ810mj I already have wont be wasted and I will be writing about what I am doing with that soon.
The other piece of information which has helped is discovery of a third way of using the WIZ module. The module can be direct bus accessed or used via an SPI bus. Since the clock speed of a BBC micro is relatively slow I ruled out the SPI bus (which is typically used by microcontrollers) and decided to bus access the module. The addressed interface has a 32KB memory map. This meant I was going to have to implement some paging logic in order to fit it in to the 6502's address space and so complicated the design. But then I discovered it supported a third access mode which requires a minimal address space. The third method is an indirect bus mode and uses the registers at 0x0001 and 0x0002 as an indirection address. You set the address of the location you want to read or write in the WIZ module in these registers and then you can read or write the value by reading or writing the register at 0x0003. This means it requires far less space in the 6502 memory map so I can use one the Beeb's external IO ports.
The schematic above shows the design of the ethernet board. The board is designed to be connected to the BBC Micro's TUBE interface. This interface provides access to the 6502's data bus; A0 to A6 of the address bus; a select line; the 2Mhz clock; the read/write line; the IRQ line and the reset line. This is all I need to drive the WIZ module. There are a couple of bus-transceiver chips to buffer the module which is actually a 5v signal tolerant 3v3 device. A small amount of TTL logic to provide /RD and /WR lines required by the ethernet module. And the link, transmit and receive signals are broken out to LEDs. The schematic does not show the derivation of the 3v3 supply nor decoupling capacitors for the ICs. There's also a small bug in so much as the A2 line is hooked through to the WIZ module. Its not needed and should be tied low.
So that's the design. I have all the parts and will be prototyping it this weekend on stripboard. Watch this space!
Cross posted from Spice World
I was having problems because the WIZ810mj module I was intending to use has 2mm board to board connectors on it. This isn't very hobbyist friendly. However I discovered very recently that there's a variation of the module, the WIZ812mj which actually has 0.1" pitch board to board connectors on it. This is great because it means I can use stripboard for construction. The WIZ810mj I already have wont be wasted and I will be writing about what I am doing with that soon.
The other piece of information which has helped is discovery of a third way of using the WIZ module. The module can be direct bus accessed or used via an SPI bus. Since the clock speed of a BBC micro is relatively slow I ruled out the SPI bus (which is typically used by microcontrollers) and decided to bus access the module. The addressed interface has a 32KB memory map. This meant I was going to have to implement some paging logic in order to fit it in to the 6502's address space and so complicated the design. But then I discovered it supported a third access mode which requires a minimal address space. The third method is an indirect bus mode and uses the registers at 0x0001 and 0x0002 as an indirection address. You set the address of the location you want to read or write in the WIZ module in these registers and then you can read or write the value by reading or writing the register at 0x0003. This means it requires far less space in the 6502 memory map so I can use one the Beeb's external IO ports.
The schematic above shows the design of the ethernet board. The board is designed to be connected to the BBC Micro's TUBE interface. This interface provides access to the 6502's data bus; A0 to A6 of the address bus; a select line; the 2Mhz clock; the read/write line; the IRQ line and the reset line. This is all I need to drive the WIZ module. There are a couple of bus-transceiver chips to buffer the module which is actually a 5v signal tolerant 3v3 device. A small amount of TTL logic to provide /RD and /WR lines required by the ethernet module. And the link, transmit and receive signals are broken out to LEDs. The schematic does not show the derivation of the 3v3 supply nor decoupling capacitors for the ICs. There's also a small bug in so much as the A2 line is hooked through to the WIZ module. Its not needed and should be tied low.
So that's the design. I have all the parts and will be prototyping it this weekend on stripboard. Watch this space!
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on 2009-08-14 05:35 am (UTC)no subject
on 2009-08-14 08:43 am (UTC)